Frank VahidProfessor-EmeritusComputer Science & Engineering vahid@ucr.edu(951) 827-4710
CSR: Medium: Modeling and synthesis for application-specific systems-on-a-chip
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AWARD NUMBER
008397-002
FUND NUMBER
33273
STATUS
Active
AWARD TYPE
3-Grant
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AWARD EXECUTION DATE
8/1/2016
BEGIN DATE
8/1/2016
END DATE
7/31/2020
AWARD AMOUNT
$492,429
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Sponsor Information
SPONSOR AWARD NUMBER
SPONSOR
SPONSOR TYPE
FUNCTION
Organized Research
PROGRAM NAME
Proposal Information
PROPOSAL NUMBER
16030229
PROPOSAL TYPE
New
ACTIVITY TYPE
Basic Research
PI Information
PI
Vahid, Frank
PI TITLE
Other
PI DEPTARTMENT
Computer Science & Engineering
PI COLLEGE/SCHOOL
Bourns College of Engineering
CO PIs
Project Information
ABSTRACT
Popular electronic devices such as e-book readers, automotive entertainment systems, digital TVs, and medical devices, are internally powered by a state-of-the-art computer chip. Such a chip may have hundreds of components, including many microprocessors, graphics processors, video processors, audio processors, memories, and more. Just a few decades ago, so many components would have required a table-sized box, but today they fit on a tiny fingernail-sized chip. Because such a chip costs tens of millions of dollars to build, companies that build these chips make them as configurable as possible, so the same chip that is used in a digital TV application may also be used in a medical device application. However, engineers have a hard time setting all the configurable features to get the chip's performance and power optimal for their specific application. The features are like the ingredients of a recipe; an imperfect balance can ruin the performance/power (or the meal). As a result, today's chips run much slower than they could, get hotter, and consume more battery than they could as well.
This project's intellectual merit includes developing techniques to automatically tune a state-of-the-art chip's many configurable features to serve any one particular application well, thus substantially improving performance and power for any application implemented on such a chip. The project will develop a unified computation model that ideally supports such techniques, empowering engineers to make best use of state-of-the-art chips.
The project's broader impacts not only include improving the performance and power of a wide variety of popular devices, but also includes a web-based tool for capturing the unified computation model. Such a tool will positively impact university education as well as practicing engineers, and can catalyze research.(Abstract from NSF)
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